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How to Plan a Summer Retreat for Your Coworkers

This past July, Array of Engineers held its first summer retreat away from the office. It was a massive hit with our team. See us in action!

How to Make Automated Testing Accessible to Non-Developers

Automating hardware-software testing is complicated. So we developed a custom Blockly application that can generate automated test scripts.

How a Video Recording Tool Can Reduce Software Test Debug Time

Debugging software tests can be a drain on resources. Learn how we developed a Video Recording Tool to help streamline debugging efforts!

White Paper: Automation of Test Case Generation and Software System Modeling

Verification & validation efforts drive 75% of aircraft software costs. Learn how Automated Test Case Generation is 5x times more efficient!

From School to Space: An Array of Engineers Co-op Experience

Pedro, an electrical engineering co-op at Array of Engineers, reflects on his co-op experience. Learn how he's helping the space industry!

White Paper: Multi-Level Hardware-in-the-Loop Test API for Hardware-Software Integration Testing

Automated hardware-software integration testing has powerful benefits. Learn how we implement automated testing through a single system.

What is Black Box Testing?

Black Box Testing is a way to test software functionality without diving into system’s source code and inner workings. Learn more.

A Case for Detailed Software Requirements and Hardware Tolerances

The level of detail for software and hardware requirements can be difficult to determine. Learn why more detailed requirements are vital.

Why a Multi-Leveled API is Critical for Automated Testing

A robust multi-leveled API is essential for conducting automated testing. Learn how we developed and utilize our API for automated testing.

Demonstrating Repercussions of Torque Ripple in a Brushless Motor

Pat Gipper uses 6-step commutation to demonstrate the effects of torque ripple in a brushless DC motor.

Array of Engineers Designs Custom SLVS-EC for FPGA Developers

Array of Engineers has designed a custom SLVS-EC (Scalable Low-Voltage Signaling with Embedded Clock) IP core for FPGA developers.

Array of Engineers Celebrates Its Fourth Anniversary

Array of Engineers celebrated its fourth anniversary on January 18th. CEO Stacy Paul reflects on the past four years.

A Beginner's Guide to Frequency Analysis for Your Simulink Model

Array of Engineers created an app that allows users to analyze Simulink models. The free app is available on the MathWorks' File Exchange.